Download PDF by Robert Bogdan Staszewski: All-Digital Frequency Synthesizer in Deep-Submicron CMOS

By Robert Bogdan Staszewski

ISBN-10: 0470041943

ISBN-13: 9780470041949

ISBN-10: 0471772550

ISBN-13: 9780471772552

A brand new and cutting edge paradigm for RF frequency synthesis and instant transmitter designLearn the options for designing and imposing an all-digital RF frequency synthesizer. unlike conventional RF innovations, this cutting edge publication units forth digitally in depth layout options that cleared the path to the advance of reasonably cheap, low-power, and hugely built-in circuits for RF services in deep submicron CMOS techniques. moreover, the authors reveal how the structure permits readers to combine an RF front-end with the electronic back-end onto a unmarried silicon die utilizing average ASIC layout flow.Taking a bottom-up method that gradually builds abilities and data, the ebook starts with an creation to uncomplicated strategies of frequency synthesis after which courses the reader via an all-digital RF frequency synthesizer design:Chapter 2 offers a digitally managed oscillator (DCO), that is the basis of a singular structure, and introduces a time-domain version used for research and VHDL simulationChapter three provides a hierarchical layer of mathematics abstraction to the DCO that makes it more straightforward to function algorithmicallyChapter four builds a section correction mechanism round the DCO such that the system's frequency float or wander functionality fits that of the sturdy exterior frequency referenceChapter five provides an program of the all-digital RF synthesizerChapter 6 describes the behavioral modeling and simulation technique utilized in designThe ultimate bankruptcy provides the implementation of an entire transmitter and experimental effects. the radical principles awarded the following were applied and confirmed in high-volume, advertisement single-chip radios built at Texas tools: Bluetooth and GSM.While the point of interest of the booklet is on RF frequency synthesizer layout, the innovations may be utilized to the layout of alternative digitally assisted analog circuits to boot. This e-book is a must-read for college students and engineers who are looking to examine a brand new paradigm for RF frequency synthesis and instant transmitter layout utilizing digitally extensive layout thoughts.

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The switchable capacitance of the finest differential LSB varactor (see Fig. 7) is on the order of tens of attofarads. Still referring to Figs. 3, let the gate potential VG start at þ2 V, at the right end of the C– V x-axis. The positively charged gate attracts a large number of electrons, which are the majority carriers of an n-type well. The varactor capacitance is relatively high because this structure behaves like a parallel-plate capacitor with only a silicon oxide dielectric in between. A gate conductor forms one plate of the capacitor and the high concentration of electrons in the n-well forms the second plate.

A gate conductor forms one plate of the capacitor and the high concentration of electrons in the n-well forms the second plate. This region of operations is termed the accumulation mode. As VG is lowered, fewer and fewer electrons are attracted to the region below the gate, and its concentration drops. This causes the effective “bottom” plate to be further separated, thus lowering the gate-to-well capacitance. As soon as the gate potential is close to zero and enters negative values, the electrons start being repelled, causing a depletion region under the gate.

8 DCO oscillator core with discrete tuning controls. 5 OPEN-LOOP NARROWBAND DIGITAL-TO-FREQUENCY CONVERSION From the functional perspective, the operation described above can be thought of as a digital-to-frequency conversion (DFC), with the digital word comprising dk bits, where k ¼ 0, 1, . . , N À 1, directly controlling the output frequency f. To illustrate that a straightforward linear DFC conversion to the RF range is not likely to work, let’s consider the following example. 4 GHz and a frequency resolution of 1 kHz, at least 22 bits of DFC resolution is required.

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All-Digital Frequency Synthesizer in Deep-Submicron CMOS by Robert Bogdan Staszewski


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